1. Field of the Invention
The present invention relates to a thin film transistor using super grain silicon crystallization (hereinafter referred to as “SGS”), and more particularly, to a TFT with multiple gates which prevents defects by removing a high-angle grain boundary in a channel region and reduces leakage current by materializing multiple gates without increasing the area.
2. Description of Related Art
A polysilicon film which is used as a semiconductor layer of a TFT is formed by crystallizing the deposited amorphous silicon film after depositing an amorphous silicon film on a substrate. Methods of crystallizing the amorphous silicon film into a polysilicon film include solid phase crystallization (SPC), excimer laser annealing (ELA), metal induced lateral crystallization (MILC), etc. The SPC process has problems of a high crystallization temperature and a long period of process time while the ELA process has problems of time and space non-uniformities due to instability of a laser. Although the MILC process has merits of a relatively low process temperature and short process time using ordinary heat treatment equipment, it has problems in that a leakage current of a device fabricated by the MILC process is larger than that of a device fabricated by other crystallization methods.
A method of fabricating a TFT using the MILC process is disclosed in U.S. Pat. No. 5,773,327. The method of fabricating a TFT suggested in U.S. Pat. No. 5,773,327 requires an additional mask process to form an MILC region, and the existence of MILC surfaces in the channel region act as defects of the TFT. The MILC surface refers to a portion in which two surfaces of crystallized polysilicon grown in an opposite direction by the MILC technique meet.
On the other hand, there are problems in that a crystallization time is increased since dimensions by multiple gates are increased, and dimensions separated between metal layers of the MILC are increased in the case that multiple gates are applied to control leakage current.